The present invention relates to semiconductor devices and, more specifically, to a hybrid dielectric scheme that allows for varying liner thicknesses and manganese (Mn) concentrations between a back-end-of-line (BEOL) line and via interconnects.
As semiconductor device technology scales beyond the 10 nm node, it has been observed that increases in BEOL resistance-capacitance (RC) are occurring. These increases are in some cases causing BEOL parasitics to become a dominant factor in the degradation of product performance and various approaches for addressing this issue have been proposed. For example, a scaling down of a copper (Cu) barrier thickness has been attempted but is often found to be insufficient is avoiding the BEOL parasitics in addition to causing problems with reliability. Thus, the use of self-formed-barriers (SFB) has become a leading candidate for achieving metallization in semiconductor devices. However, because SFBs typically require high dopant (Mn) concentrations in Cu, the choice to employ SFBs can lead to an increase in an overall resistance in interconnects of the semiconductor devices.